1. Field of the Invention
The present invention relates to a multi-bit delta-sigma modulator.
The present invention has been produced from the work supported by the IT R&D program of MIC (Ministry of Information and Communication)/IITA (Institute for Information Technology Advancement) [2005-S-073-02, Development of semiconductor circuit design based on the nano-scaled device] in Korea.
2. Discussion of Related Art
Delta-sigma modulators developed prior to the 1960's are still being studied in various applications with a focus on analog-to-digital conversion technologies through the improvement of wireless communication industries.
In particular, recent efforts have been concentrating on delta-sigma modulators capable of processing wide-band multi-bits without decreasing signal-to-noise ratios, and these kinds of delta-sigma modulators are now used extensively in the fields of digital video and audio processing, wired and wireless communication, radar, and so on.
FIG. 1 is a schematic circuit diagram of a conventional second order delta-sigma modulator.
Referring to FIG. 1, the delta-sigma modulator includes a first integrator 101, a second integrator 103, an analog-to-digital converter (ADC) 105, and a digital-to-analog converter (DAC) 107.
This kind of delta-sigma modulator is a circuit that is widely used in general analog-to-digital modulation systems, as it minimizes quantization noises which are inevitably generated while converting an analog signal to a digital signal in a required low frequency band. This delta-sigma modulator is characterized by a good result for reduction of quantization noises q as high as an oversampling ratio (OSR).
However, the structure of the delta-sigma modulator shown in FIG. 1 is required to have an analog block with a low distortion characteristic in order to satisfy the distortion characteristic of the system in the condition of a low OSR. In particular, an analog circuit in the analog block must operate with a low distortion and high-speed characteristic in the case of wide-band application, but it is difficult to design the analog block with such a characteristic.
FIG. 2 is a schematic circuit diagram of a conventional delta-sigma modulator with a characteristic of low distortion.
Referring to FIG. 2, the delta-sigma modulator with low distortion characteristic includes a first integrator 201, a second integrator 203, an ADC 205, and a DAC 209. The delta-sigma modulator of FIG. 2 may further include a scrambler logic 207 in the case of processing multi-bits.
Such a low-distortion delta-sigma modulator called full-feed forward architecture is structured to directly input an analog input signal u into the ADC 205. Thus, the first and second integrators 201 and 203 are able to process only quantization noise, having an excellent input-dependent distortion characteristic.
The scrambler logic 207 is a circuit that is added to improve DAC characteristics in non-linearity caused by various non-linear characteristics in a fabrication process. The scrambler logic 207 has a delay component as a digital circuit.
However, even the full-feed forward delta-sigma modulator requires a fast feedback loop in order to eliminate delay component of analog input signal u in case of multi-bit signal, and so it requires the delay-free scrambler logic 207 and the delay-free ADC 205.
That is, an input of the ADC 205 must be guided to pass through the ADC 205, the scrambler logic 207, and the first integrator 201 in one clock period.
In this case, there is a delay component while converting a signal by the ADC 205 and the scrambler logic. Therefore, this architecture is not appropriate for a high speed converter using multi-bit architecture.
Therefore, a suitable structure of delta-sigma modulator which also has a low-distortion characteristic is required for a multi-bit fast operation.